This invention relates to a reduced projection type step- and repeat-exposure apparatus for forming a pattern on a semiconductor chip.
In the conventional reduced projection type step-and repeat-exposure apparatus, the mask and wafer are fixed at a certain angle with respect to the plane orthogonal to the optical axis of the exposure optical system, when a pattern is formed on a single semiconductor wafer.
Actually, the surface of the semiconductor wafer is irregular. For example, the irregularity of a 10.times.10 mm.sup.2 wafer is about 3 .mu.m in height. This figure is not negligible. Further, it implies that a relatively large focus margin is required for accurate patterning. The wafer surface irregularity is more remarkable when elements and circuit wiring are formed on the wafer. In this case, the required focus margin is at least 4 .mu.m.
Increasing the resolution of the optical system is one of a number of effective approaches for realizing accurate patterning. However, increased resolution inevitably results in a reduction of the focus margin. For example, in order to form a pattern with a 0.8 .mu.m width on the wafer by using a lens of 0.4 NA, the tolerable focus margin is then 3 .mu.m maximum. When, however, the tolerable focus margin is 3 .mu.m maximum, an accurate pattern can not be formed on a 10.times.10 mm.sup.2 wafer whose irregularity is 3 .mu.m minimum in height.